Internship Embedded Software Internship Texas Instruments, India Technical Projects High-Performance and Energy-Efficient In-Order Cores Implemented the Freeflow and Load-Slice in-order core designs which help increase performance and energy efficiency Superscalar Processor Design Designed a 2-way fetch out-of-order superscalar processor in VHDL EEG Data Acquistion System Designed a 24-channel data acquisition system for capturing EEG signals FPGA Accelerator for SNNs Implemented and simulated an FPGA-based accelerator for Spiking Neural Networks VLSI Circuit Design Implementing various digital circuit designs in VHDL Cross-coupled VCO Design Designed a Cross-coupled Voltage-controlled Oscillator for the specified parameters and implemented it using Cadence Virtuoso 2-stage OTA Design Designed a 2-stage Operational Transconductance Amplifier for the specified parameters and implemented it using Cadence Virtuoso Optimum Device Design for NIPIN Selector Performed experiments on the NIPIN device by varying i-region widths, temperature an introducing SiGe in the p-region Spiking Equilibrium Propagation for Real-time Learning Implemented the Equi-Prop system using 45nm CMOS technology VLSI Circuit Partitioning Techniques Implemented and analyzed graph partitioning algorithms and heuristics RISC Processor Design Designed and implemented 16-bit 6-stage pipelined processor in VHDL Valet Parking Bot Built a line-follower bot, capable of obstacle-avoidance and parking using the Arduino-UNO based Alphabot Error Correction in FSK Implemented an Error-correction mechanism in FSK using Convolutional codes Dual-Band Filter Design Designed Butterworth, Chebyshev, Elliptical and FIR Filters for given specifications RUL Estimation for EV Batteries Estimated the Remaining Useful Life of Li-ion EV batteries with an R2 score of 98.09 Digital Circuit Design Estimated the Remaining Useful Life of Li-ion EV batteries with an R2 score of 98.09 Microprocessor Implementations Estimated the Remaining Useful Life of Li-ion EV batteries with an R2 score of 98.09 Reading Projects General-Purpose GPUs Evaluating an adaptive LLC caching scheme for general-purpose GPUs Operating Systems Evaluating an adaptive LLC caching scheme for general-purpose GPUs