Anubhav Bhatla
Senior Undergraduate, Electrical Engineering, IIT Bombay
Hey! I am Anubhav, a fifth-year undergraduate at the Department of the Electrical Engineering, IIT Bombay. I am pursuing an Integrated Bachelors + Masters of Technology (Dual Degree) in Electrical Engineering with a specialisation in Electronic Systems, and a Minor in Computer Science and Engineering.
I am deeply interested in the research area of Computer Architecture, which involves a good mix of fascinating topics in Electrical and Computer Science. I am currently working on research topics in Hardware Security, designing cache structures to ensure security against various side-channel attacks. I am also exploring branch predictor partitioning techniques for security and performance.
Outside of academics, I enjoy reading books (mostly fiction) and follow sports such as tennis, cricket, and badminton. I have also completed one year of training under the National Cadet Corps (NCC) at IIT Bombay.
Research Interests:
- Computer Systems and Architecture
- Hardware Security
- VLSI Circuit Design
In pursuit of these interests, I have been a part of the following research groups:
- CASPER - Computer Architecture for Security and Performance Group - Prof. Biswabandan Panda
- Memory Systems Lab - Prof. Moinuddin Qureshi
- PACL - High Performance Processor Architecture and Compilation Lab - Prof. Dean Tullsen
- CADSL - Computer Architecture and Dependable Systems Lab - Prof. Virendra Singh
- CY-PHY - Cyber Physical Systems Lab - Prof. Siddharth Tallur
news
Sep 30, 2024 | I have been awarded the Intel India Research Fellowship 2024-25. |
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Jul 1, 2024 | We presented the Maya Cache at the International Symposium on Computer Architecture (ISCA’24) held in Buenos Aires, Argentina. |
Mar 20, 2024 | Maya Cache has been accepted to appear at the International Symposium on Computer Architecture (ISCA’24) to be held in Buenos Aires, Argentina. |